We are seeking a seasoned AI Domain Expert to lead the strategic design and deployment of advanced AI capabilities across the Microcontroller Development for product, test, and manufacturing lifecycle. This role drives AI adoption to accelerate product cycles, increase engineering efficiency, automation, and enable a shift-left design and technology approach that identifies risks earlier, improves predictability, and enhances product quality. The successful candidate brings 15+ years of Microcontroller domain expertise, combined with hands-on AI architecture experience using LLMs, multi-agent systems, Model Context Protocol (MCP), AI skills frameworks, and autonomous engineering workflows. This is a high business impact technical leadership role responsible for shaping the future of semiconductor engineering by leveraging AI to deliver more products, faster, with fewer resources and higher quality.

Your Role

Key responsibilities in your new role

• AI Architecture & Enterprise Strategy
• Define and lead the enterprise-wide AI architecture supporting product development, test engineering, and manufacturing operations.
• Build scalable AI ecosystems using LLMs, intelligent agents, token-based workflows, and multimodal data integration.
• Drive an AI roadmap focused on effort reduction, efficiency gains, and accelerated engineering throughput.
• Shift-Left Product Development & Pre-Silicon Predictive Analytics
• Architect AI-driven pre-silicon prediction platforms to identify potential yield, performance, and reliability issues before tape‑out.
• Integrate simulation, modelling, RTL/DV data, and historical silicon learning to predict failure modes early.
• Influence upstream design, architecture, DFT, and validation teams to make data-informed decisions earlier in the lifecycle, reducing downstream debug cycles.
• Silicon Characterization, Test Optimization & Yield Engineering
• Drive and develop AI systems for:
• silicon characterization correlation and signature learning
• defect density and parametric variation analysis
• adaptive test and test time reduction
• yield ramp acceleration and early risk detection
• automated root-cause identification and anomaly detection
• Drive cycle-time reduction across product and test engineering, and system-level debug for customers by leveraging autonomous AI agents.
• Product Engineering Leadership
• Lead characterization, qualification, and reliability engineering for MCUs.
• Oversee silicon debug, failure analysis, and corrective actions.
• Drive AEC-Q100, ISO 26262 for compliance and manufacturing readiness.
• Architect advanced test strategies across wafer probe, ATE, and final test.
• Productivity, Automation & Engineering
• Drive and enable autonomous engineering assistants that perform:
• automated data analysis
• debug triage
• pattern detection
• report generation
• decision recommendations
• Deploy AI workflows that significantly reduce manual analysis time, freeing engineers to focus on higher-value activities.
• Implement solutions that enable more products to be developed and ramped in shorter cycle times, improving organizational capacity.
• Data Architecture & Cross-Lifecycle Integration
• Lead the integration of heterogeneous datasets—including design, fab, OSAT, operations, system test, and field data—into unified AI-ready data platforms.
• Ensure that AI pipelines are secure, scalable, compliant, and aligned with enterprise governance standards.
• Leadership, Influence & Collaboration
• Act as a senior technical authority, influencing strategic direction across design, technology development, manufacturing, test operations, and product engineering.
• Mentor senior engineers and drive AI skill development across the organization.
• Represent the company’s AI leadership in internal forums, industry groups, and external engagements as needed.
  
  
  

Your Profile

Qualifications And Skills To Help You Succeed

• 15+ years of semiconductor experience spanning product development, test engineering, silicon bring-up, characterization, and yield engineering.
• Deep understanding of the full semiconductor lifecycle:
• architecture → RTL → Design Verification → DFT → pre‑Si modelling -> technology
• silicon bring-up, validation, and characterization
• ATE development, OSAT/test operations, system debug
• yield learning, defect density modelling, parametric analysis
  
  
  
  

• Demonstrated success applying AI/ML techniques in engineering environments
• Expertise in:
• LLM architectures, embeddings, vector stores
• multi-agent systems and autonomous agent frameworks
• Model Context Protocol (MCP) and skills-based AI architecture
• Proven ability to deliver production-scale AI solutions that improve cycle time, predictability, and engineering efficiency.
• Strong leadership, communication, and cross-functional influence capabilities.
  

Preferred Experience

• Experience leading AI transformation initiatives within semiconductor or advanced manufacturing environments.
• Experience with enterprise AI systems and heterogeneous data integration.
• Familiarity with cloud and distributed compute systems for AI workloads.
• AI/ML experience in predictive analytics, adaptive test and anomaly detection.
• Experience with ATE platforms (Teradyne, Advantest, LTX-Credence).
• Background with EDA tools, DFT/DV, technology development, or yield engineering is added advantage. Record of publications, patents, or industry thought leadership
  
  

Contact:

Sherlene Ong

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